The present invention relates to a semiconductor memory device having a mask ROM structure, and more particularly to a semiconductor memory device having an error correcting function.
A semiconductor memory device having a mask ROM structure is known. A memory cell array including a plurality of memory cells is configured by mask ROM elements. Information is written into the memory cell array during manufacturing the memory device. Once information is written into the memory cell array, it is impossible to revise the written information. Actually, a memory device has some defective memory cells. Thus, a programmable ROM is incorporated in the memory device. After fabricating the memory device, it is subjected to a test for locating defective memory cells. The address of each detected defective memory cell is written into the programmable ROM. That is, the defective memory cells are replaced by memory cells of the programmable ROM. When the address of a defective memory cell is designated, the corresponding memory cell of the programmable ROM is accessed and information stored therein is read out from the programmable ROM.
However, memory cells of the programmable ROM are larger than those of the mask ROM. For this reason, a large area on a chip must be provided for the programmable ROM. This decreases the integration density of the memory device. Further, it takes an extremely long time to write address information and data on defective memory cells into the programmable ROM.